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author | Amelie Delaunay <amelie.delaunay@foss.st.com> | 2021-01-05 10:48:54 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-01-12 12:54:42 +0100 |
commit | f228cb27c56163dcb55dfb62e176a08f45020faf (patch) | |
tree | a03116cba14b527cc8bd81be4818aa276ff5b35f /certs | |
parent | 2979ee7a91127a2d6fddd4e98d450ee782115772 (diff) |
usb: dwc2: enable FS/LS PHY clock select on STM32MP15 FS OTG
When the core is in FS host mode, using the FS transceiver, and a Low-Speed
device is connected, transceiver clock is 6Mhz.
So, to support Low-Speed devices, enable support of FS/LS Low Power mode,
so that the PHY supplies a 6 MHz clock during Low-Speed mode.
Acked-by: Minas Harutyunyan <Minas.Harutyunyan@synopsys.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20210105094855.30763-3-amelie.delaunay@foss.st.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'certs')
0 files changed, 0 insertions, 0 deletions