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author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-10-22 06:58:23 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-10-22 06:58:23 -0400 |
commit | 936fd00549d26a19be723cf7cc1c0b1aa50f9fde (patch) | |
tree | ece248d2be77cce290560f9177bde6b4e4e76889 /block | |
parent | 9e415a8edce53fb0fed28e15bc06522d122e872e (diff) | |
parent | ce56a86e2ade45d052b3228cdfebe913a1ae7381 (diff) |
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"A couple of fixes addressing the following issues:
- The last polishing for the TLB code, removing the last BUG_ON() and
the debug file along with tidying up the lazy TLB code.
- Prevent triple fault on 1st Gen. 486 caused by stupidly calling the
early IDT setup after the first function which causes a fault which
should be caught by the exception table.
- Limit the mmap of /dev/mem to valid addresses
- Prevent late microcode loading on Broadwell X
- Remove a redundant assignment in the cache info code"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/mm: Limit mmap() of /dev/mem to valid physical addresses
x86/mm: Remove debug/x86/tlb_defer_switch_to_init_mm
x86/mm: Tidy up "x86/mm: Flush more aggressively in lazy TLB mode"
x86/mm/64: Remove the last VM_BUG_ON() from the TLB code
x86/microcode/intel: Disable late loading on model 79
x86/idt: Initialize early IDT before cr4_init_shadow()
x86/cpu/intel_cacheinfo: Remove redundant assignment to 'this_leaf'
Diffstat (limited to 'block')
0 files changed, 0 insertions, 0 deletions