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authorSteve Capper <steve.capper@linaro.org>2014-05-06 14:02:27 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2014-05-09 16:10:58 +0100
commit206a2a73a62d37c8b8f6ddd3180c202b2e7298ab (patch)
tree0d62a75a3e29667792ee37e3c5aed14d1bc03303 /block/scsi_ioctl.c
parentba6bf8c85cb0d263ca9a98ef6a76ab651a97c60b (diff)
arm64: mm: Create gigabyte kernel logical mappings where possible
We have the capability to map 1GB level 1 blocks when using a 4K granule. This patch adjusts the create_mapping logic s.t. when mapping physical memory on boot, we attempt to use a 1GB block if both the VA and PA start and end are 1GB aligned. This both reduces the levels of lookup required to resolve a kernel logical address, as well as reduces TLB pressure on cores that support 1GB TLB entries. Signed-off-by: Steve Capper <steve.capper@linaro.org> Tested-by: Jungseok Lee <jays.lee@samsung.com> [catalin.marinas@arm.com: s/prot_sect_kernel/PROT_SECT_NORMAL_EXEC/] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'block/scsi_ioctl.c')
0 files changed, 0 insertions, 0 deletions