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authorPaul Burton <paul.burton@imgtec.com>2015-05-24 16:11:38 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-06-21 21:53:18 +0200
commited286ca5d627619673b7dad27f48252498e3905c (patch)
tree57f3ea2b35095dff18f149a54474a2508cc5c897 /arch
parent41dd641e9a1a7229383f9b342a57cb6720e7ea46 (diff)
MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cgu
The jz4740-cgu driver already has access to the CGU, so it makes sense to move the few remaining accesses to the CGU from arch/mips/jz4740 there too. Move the jz4740_clock_udc_{dis,en}able_auto_suspend functions there for such consistency. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mike Turquette <mturquette@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10154/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/jz4740/clock.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c
index 90b44d728cbd..2a1082920f46 100644
--- a/arch/mips/jz4740/clock.c
+++ b/arch/mips/jz4740/clock.c
@@ -33,7 +33,6 @@
#define JZ_CLOCK_GATE_UART0 BIT(0)
#define JZ_CLOCK_GATE_TCU BIT(1)
-#define JZ_CLOCK_GATE_UDC BIT(11)
#define JZ_CLOCK_GATE_DMAC BIT(12)
#define JZ_CLOCK_PLL_STABLE BIT(10)
@@ -64,18 +63,6 @@ static void jz_clk_reg_clear_bits(int reg, uint32_t mask)
writel(val, jz_clock_base + reg);
}
-void jz4740_clock_udc_disable_auto_suspend(void)
-{
- jz_clk_reg_clear_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC);
-}
-EXPORT_SYMBOL_GPL(jz4740_clock_udc_disable_auto_suspend);
-
-void jz4740_clock_udc_enable_auto_suspend(void)
-{
- jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE, JZ_CLOCK_GATE_UDC);
-}
-EXPORT_SYMBOL_GPL(jz4740_clock_udc_enable_auto_suspend);
-
void jz4740_clock_suspend(void)
{
jz_clk_reg_set_bits(JZ_REG_CLOCK_GATE,