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authorPratik Patel <pratikp@codeaurora.org>2014-11-03 11:07:37 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-11-07 15:19:32 -0800
commitdc161b9f01142c6b2c985290b7aa3e58e2408036 (patch)
tree01cf209bf782309ac8bf4fde051a505a2b52d9d8 /arch
parentbc4bf7fe98daf4e64cc5ffc6cdc0e820f4d99c14 (diff)
coresight-tpiu: add CoreSight TPIU driver
This driver manages CoreSight TPIU (Trace Port Interface Unit) which acts as a sink. TPIU is typically connected to some offchip hardware hosting a storage buffer. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig.debug9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 092b6728af55..4815efbbb55d 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1359,5 +1359,14 @@ config CORESIGHT_LINK_AND_SINK_TMC
- ETR) or sink (embedded trace FIFO). The driver complies with the
generic implementation of the component without special enhancement or
added features.
+
+config CORESIGHT_SINK_TPIU
+ bool "Coresight generic TPIU driver"
+ depends on CORESIGHT_LINKS_AND_SINKS
+ help
+ This enables support for the Trace Port Interface Unit driver, responsible
+ for bridging the gap between the on-chip coresight components and a trace
+ port collection engine, typically connected to an external host for use
+ case capturing more traces than the on-board coresight memory can handle.
endif
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