diff options
author | Arnd Bergmann <arnd@arndb.de> | 2019-09-03 15:33:24 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2019-09-03 15:33:25 +0200 |
commit | daf9d2dbc84b6042d19f9819d2f721c1baa81985 (patch) | |
tree | 50ae97b900960b8c36b03b5dd4545619346c7a1d /arch | |
parent | 1c92b32649f950c78c36d15b2e7ecbed1dcf024c (diff) | |
parent | 57012813f1ba82412cdcc3665b04d4353b357378 (diff) |
Merge tag 'renesas-arm-dt-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.4
- Fix HSCIF PM Domain on R-Car H1,
- PMU support for RZ/G1C.
* tag 'renesas-arm-dt-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: dts: r8a77470: Add PMU device node
ARM: dts: r8a7779: Use SYSC "always-on" PM Domain for HSCIF
Link: https://lore.kernel.org/r/20190823123643.18799-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/r8a77470.dtsi | 7 | ||||
-rw-r--r-- | arch/arm/boot/dts/r8a7779.dtsi | 4 |
2 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi index 56cb10b42ed9..51806c7f486a 100644 --- a/arch/arm/boot/dts/r8a77470.dtsi +++ b/arch/arm/boot/dts/r8a77470.dtsi @@ -63,6 +63,13 @@ clock-frequency = <0>; }; + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, + <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; + /* External SCIF clock */ scif_clk: scif { compatible = "fixed-clock"; diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 3ff259207527..ebf5b7cfe215 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -296,7 +296,7 @@ <&cpg_clocks R8A7779_CLK_S>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; @@ -309,7 +309,7 @@ <&cpg_clocks R8A7779_CLK_S>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg_clocks>; + power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; status = "disabled"; }; |