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authorAndi Kleen <ak@linux.intel.com>2014-09-02 11:44:12 -0700
committerIngo Molnar <mingo@kernel.org>2014-09-24 14:48:16 +0200
commitd86c8eaf95700d932bdfa8a4f7b4e6d28949fd84 (patch)
treedb29d6866c0d67e06e2d04c95f419d18a4a8524a /arch
parentb76146851eeba6ad9fef982e8cf7cd8ebd4d30e1 (diff)
perf/x86/intel: Document all Haswell models
Add names for each Haswell model as requested by Peter. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: eranian@google.com Link: http://lkml.kernel.org/r/1409683455-29168-2-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index f962e2639e94..7c9f78ed421e 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -2540,10 +2540,10 @@ __init int intel_pmu_init(void)
break;
- case 60: /* 22nm Haswell */
- case 63:
- case 69:
- case 70:
+ case 60: /* 22nm Haswell Core */
+ case 63: /* 22nm Haswell Server */
+ case 69: /* 22nm Haswell ULT */
+ case 70: /* 22nm Haswell + GT3e (Intel Iris Pro graphics) */
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, sizeof(hw_cache_event_ids));
memcpy(hw_cache_extra_regs, snb_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));