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authorTony Lindgren <tony@atomide.com>2017-08-30 08:19:43 -0700
committerTony Lindgren <tony@atomide.com>2017-09-19 10:26:08 -0700
commitd6e1a2381694c9a15f5a2ea9877fd20017470e95 (patch)
tree58835477c6264bd9545c6721bc17d7e65245c9e7 /arch
parent514b2da46fcc10bd5f42446b9fa746ba2c80aaf1 (diff)
ARM: dts: Add missing onewire node for omap4
On omap4 we're missing the onewire node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/omap4.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index c48b7e8713ca..69d129b420e0 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -541,6 +541,13 @@
dma-names = "tx0", "rx0", "tx1", "rx1";
};
+ hdqw1w: 1w@480b2000 {
+ compatible = "ti,omap3-1w";
+ reg = <0x480b2000 0x1000>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "hdq1w";
+ };
+
mcspi3: spi@480b8000 {
compatible = "ti,omap4-mcspi";
reg = <0x480b8000 0x200>;