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authorHauke Mehrtens <hauke@hauke-m.de>2016-12-07 22:32:00 +0100
committerRalf Baechle <ralf@linux-mips.org>2016-12-11 11:20:25 +0100
commitba735155b9647b6167fd50276ca0fbfbce4e836c (patch)
treea18f4165795a4c40f17807eba73852d65578c912 /arch
parentedb6fa1a6452edf736c04d02e3f6de59043df69e (diff)
MIPS: Lantiq: Fix mask of GPE frequency
The hardware documentation says bit 11:10 are used for the GPE frequency selection. Fix the mask in the define to match these bits. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Thomas Langer <thomas.langer@intel.com> Cc: linux-mips@linux-mips.org Cc: john@phrozen.org Patchwork: https://patchwork.linux-mips.org/patch/14648/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/lantiq/falcon/sysctrl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c
index 2a1b3021589c..82bbd0e2e298 100644
--- a/arch/mips/lantiq/falcon/sysctrl.c
+++ b/arch/mips/lantiq/falcon/sysctrl.c
@@ -24,7 +24,7 @@
/* GPE frequency selection */
#define GPPC_OFFSET 24
-#define GPEFREQ_MASK 0x00000C0
+#define GPEFREQ_MASK 0x0000C00
#define GPEFREQ_OFFSET 10
/* Clock status register */
#define SYSCTL_CLKS 0x0000