diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-12-18 18:18:03 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-12-18 18:18:03 -0800 |
commit | b0b3a37b908b5906524c11f3ca12cd7c9d4adc1c (patch) | |
tree | 1fd9e48f602bef936322b6bc526db7ffa80bda09 /arch | |
parent | 3be134e5152f08e8bd3c2afdaac723f64d93c2bb (diff) | |
parent | d3e5925902dc0f639efc3641e07fca2bd7af5441 (diff) |
Merge tag 'rtc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux
Pull RTC updates from Alexandre Belloni:
"Subsystem:
- non-modular drivers are now explicitly non-modular
New driver:
- Epson Toyocom rtc-7301sf/dg
Drivers:
- cmos: reject unsupported alarm values wrt the RTC capabilities
- ds1307: ACPI support
- jz4740: DT support, jz4780 handling, can now be used as a system
power controller
- mcp795: many fixes, in particular proper month handling
- twl: driver is now DT only"
* tag 'rtc-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (31 commits)
rtc: mcp795: Fix whitespace and indentation.
rtc: mcp795: Prefer using the BIT() macro.
rtc: mcp795: fix month write resetting date to 1.
rtc: mcp795: fix time range difference between linux and RTC chip.
rtc: mcp795: fix bitmask value for leap year (LP).
rtc: mcp795: use bcd2bin/bin2bcd.
rtc: add support for EPSON TOYOCOM RTC-7301SF/DG
rtc: ds1307: Add ACPI support
rtc: imxdi: (trivial) fix a typo
rtc: ds1374: Merge conditional + WARN_ON()
rtc: twl: make driver DT only
rtc: twl: kill static variables
rtc: fix typos in Kconfig
rtc: jz4740: make the driver builtin only
rtc: jz4740: remove unused EXPORT_SYMBOL
Documentation: bindings: fix twl-rtc documentation
rtc: Enable compile testing for Maxim and Samsung drivers
MIPS: jz4740: Remove obsolete code
MIPS: qi_lb60: Probe RTC driver from DT and use it as power controller
MIPS: jz4740: DTS: Probe the jz4740-rtc driver from devicetree
...
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/boot/dts/ingenic/jz4740.dtsi | 11 | ||||
-rw-r--r-- | arch/mips/boot/dts/ingenic/qi_lb60.dts | 4 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-jz4740/platform.h | 1 | ||||
-rw-r--r-- | arch/mips/jz4740/board-qi_lb60.c | 1 | ||||
-rw-r--r-- | arch/mips/jz4740/platform.c | 21 | ||||
-rw-r--r-- | arch/mips/jz4740/reset.c | 63 |
6 files changed, 15 insertions, 86 deletions
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index f6ae6ed9c4b1..3e1587f1f77a 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -44,6 +44,17 @@ #clock-cells = <1>; }; + rtc_dev: rtc@10003000 { + compatible = "ingenic,jz4740-rtc"; + reg = <0x10003000 0x40>; + + interrupt-parent = <&intc>; + interrupts = <15>; + + clocks = <&cgu JZ4740_CLK_RTC>; + clock-names = "rtc"; + }; + uart0: serial@10030000 { compatible = "ingenic,jz4740-uart"; reg = <0x10030000 0x100>; diff --git a/arch/mips/boot/dts/ingenic/qi_lb60.dts b/arch/mips/boot/dts/ingenic/qi_lb60.dts index 2414d63ae818..be1a7d3a3e1b 100644 --- a/arch/mips/boot/dts/ingenic/qi_lb60.dts +++ b/arch/mips/boot/dts/ingenic/qi_lb60.dts @@ -13,3 +13,7 @@ &ext { clock-frequency = <12000000>; }; + +&rtc_dev { + system-power-controller; +}; diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h index 073b8bfbb3b3..3645974b7f65 100644 --- a/arch/mips/include/asm/mach-jz4740/platform.h +++ b/arch/mips/include/asm/mach-jz4740/platform.h @@ -22,7 +22,6 @@ extern struct platform_device jz4740_udc_device; extern struct platform_device jz4740_udc_xceiv_device; extern struct platform_device jz4740_mmc_device; -extern struct platform_device jz4740_rtc_device; extern struct platform_device jz4740_i2c_device; extern struct platform_device jz4740_nand_device; extern struct platform_device jz4740_framebuffer_device; diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c index 258fd03c9ef5..a5bd94b95263 100644 --- a/arch/mips/jz4740/board-qi_lb60.c +++ b/arch/mips/jz4740/board-qi_lb60.c @@ -438,7 +438,6 @@ static struct platform_device *jz_platform_devices[] __initdata = { &jz4740_pcm_device, &jz4740_i2s_device, &jz4740_codec_device, - &jz4740_rtc_device, &jz4740_adc_device, &jz4740_pwm_device, &jz4740_dma_device, diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c index 2f1dab35c061..5b7cdd67a9d9 100644 --- a/arch/mips/jz4740/platform.c +++ b/arch/mips/jz4740/platform.c @@ -88,27 +88,6 @@ struct platform_device jz4740_mmc_device = { .resource = jz4740_mmc_resources, }; -/* RTC controller */ -static struct resource jz4740_rtc_resources[] = { - { - .start = JZ4740_RTC_BASE_ADDR, - .end = JZ4740_RTC_BASE_ADDR + 0x38 - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = JZ4740_IRQ_RTC, - .end = JZ4740_IRQ_RTC, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device jz4740_rtc_device = { - .name = "jz4740-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(jz4740_rtc_resources), - .resource = jz4740_rtc_resources, -}; - /* I2C controller */ static struct resource jz4740_i2c_resources[] = { { diff --git a/arch/mips/jz4740/reset.c b/arch/mips/jz4740/reset.c index 954e669c9e6b..67780c4b6573 100644 --- a/arch/mips/jz4740/reset.c +++ b/arch/mips/jz4740/reset.c @@ -57,71 +57,8 @@ static void jz4740_restart(char *command) jz4740_halt(); } -#define JZ_REG_RTC_CTRL 0x00 -#define JZ_REG_RTC_HIBERNATE 0x20 -#define JZ_REG_RTC_WAKEUP_FILTER 0x24 -#define JZ_REG_RTC_RESET_COUNTER 0x28 - -#define JZ_RTC_CTRL_WRDY BIT(7) -#define JZ_RTC_WAKEUP_FILTER_MASK 0x0000FFE0 -#define JZ_RTC_RESET_COUNTER_MASK 0x00000FE0 - -static inline void jz4740_rtc_wait_ready(void __iomem *rtc_base) -{ - uint32_t ctrl; - - do { - ctrl = readl(rtc_base + JZ_REG_RTC_CTRL); - } while (!(ctrl & JZ_RTC_CTRL_WRDY)); -} - -static void jz4740_power_off(void) -{ - void __iomem *rtc_base = ioremap(JZ4740_RTC_BASE_ADDR, 0x38); - unsigned long wakeup_filter_ticks; - unsigned long reset_counter_ticks; - struct clk *rtc_clk; - unsigned long rtc_rate; - - rtc_clk = clk_get(NULL, "rtc"); - if (IS_ERR(rtc_clk)) - panic("unable to get RTC clock"); - rtc_rate = clk_get_rate(rtc_clk); - clk_put(rtc_clk); - - /* - * Set minimum wakeup pin assertion time: 100 ms. - * Range is 0 to 2 sec if RTC is clocked at 32 kHz. - */ - wakeup_filter_ticks = (100 * rtc_rate) / 1000; - if (wakeup_filter_ticks < JZ_RTC_WAKEUP_FILTER_MASK) - wakeup_filter_ticks &= JZ_RTC_WAKEUP_FILTER_MASK; - else - wakeup_filter_ticks = JZ_RTC_WAKEUP_FILTER_MASK; - jz4740_rtc_wait_ready(rtc_base); - writel(wakeup_filter_ticks, rtc_base + JZ_REG_RTC_WAKEUP_FILTER); - - /* - * Set reset pin low-level assertion time after wakeup: 60 ms. - * Range is 0 to 125 ms if RTC is clocked at 32 kHz. - */ - reset_counter_ticks = (60 * rtc_rate) / 1000; - if (reset_counter_ticks < JZ_RTC_RESET_COUNTER_MASK) - reset_counter_ticks &= JZ_RTC_RESET_COUNTER_MASK; - else - reset_counter_ticks = JZ_RTC_RESET_COUNTER_MASK; - jz4740_rtc_wait_ready(rtc_base); - writel(reset_counter_ticks, rtc_base + JZ_REG_RTC_RESET_COUNTER); - - jz4740_rtc_wait_ready(rtc_base); - writel(1, rtc_base + JZ_REG_RTC_HIBERNATE); - - jz4740_halt(); -} - void jz4740_reset_init(void) { _machine_restart = jz4740_restart; _machine_halt = jz4740_halt; - pm_power_off = jz4740_power_off; } |