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authorOlof Johansson <olof@lixom.net>2019-04-28 13:26:01 -0700
committerOlof Johansson <olof@lixom.net>2019-04-28 13:26:01 -0700
commitad4144210635ca5531cba6f152a3099756c9a11b (patch)
treed6351f9cd8f2c945d5c7c0d1c46ff662c62244ef /arch
parentc7edf1971614b6bf5f07599ed2d8735187e4d02e (diff)
parentc7861adbe37f576931650ad8ef805e0c47564b9a (diff)
Merge tag 'imx-fixes-5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 5.1, round 3: - A fix on LS1021A-TWR board that SGMII PCS link remains down for eTSEC0 upon an ifdown/ifup sequence. * tag 'imx-fixes-5.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: ls1021: Fix SGMII PCS link remaining down after PHY disconnect Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/ls1021a-twr.dts9
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi11
2 files changed, 18 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
index 97e1fb7ea932..9b1fe99d55b1 100644
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -145,7 +145,7 @@
};
&enet0 {
- tbi-handle = <&tbi1>;
+ tbi-handle = <&tbi0>;
phy-handle = <&sgmii_phy2>;
phy-connection-type = "sgmii";
status = "okay";
@@ -225,6 +225,13 @@
sgmii_phy2: ethernet-phy@2 {
reg = <0x2>;
};
+ tbi0: tbi-phy@1f {
+ reg = <0x1f>;
+ device_type = "tbi-phy";
+ };
+};
+
+&mdio1 {
tbi1: tbi-phy@1f {
reg = <0x1f>;
device_type = "tbi-phy";
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index b4f2723ecd86..89eab1fd1f7f 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -701,7 +701,7 @@
};
mdio0: mdio@2d24000 {
- compatible = "gianfar";
+ compatible = "fsl,etsec2-mdio";
device_type = "mdio";
#address-cells = <1>;
#size-cells = <0>;
@@ -709,6 +709,15 @@
<0x0 0x2d10030 0x0 0x4>;
};
+ mdio1: mdio@2d64000 {
+ compatible = "fsl,etsec2-mdio";
+ device_type = "mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2d64000 0x0 0x4000>,
+ <0x0 0x2d50030 0x0 0x4>;
+ };
+
ptp_clock@2d10e00 {
compatible = "fsl,etsec-ptp";
reg = <0x0 0x2d10e00 0x0 0xb0>;