diff options
| author | Paul Burton <paul.burton@mips.com> | 2019-10-01 21:53:32 +0000 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-10-07 09:42:52 -0700 |
| commit | aad028cadb17867d257e8b90078f6a19614775ff (patch) | |
| tree | ebc5bbb543dc184474688797f4de13303496b911 /arch | |
| parent | d6103510e7ccdc992e4eca7031eae366117ae6d4 (diff) | |
MIPS: bitops: Avoid redundant zero-comparison for non-LLSC
The IRQ-disabling non-LLSC fallbacks for bitops on UP systems already
return a zero or one, so there's no need to perform another comparison
against zero. Move these comparisons into the LLSC paths to avoid the
redundant work.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/bitops.h | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index 0f8ff896e86b..7671db2a7b73 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -264,6 +264,8 @@ static inline int test_and_set_bit_lock(unsigned long nr, : "=&r" (temp), "+m" (*m), "=&r" (res) : "ir" (BIT(bit)) : __LLSC_CLOBBER); + + res = res != 0; } else { loongson_llsc_mb(); do { @@ -279,12 +281,12 @@ static inline int test_and_set_bit_lock(unsigned long nr, : __LLSC_CLOBBER); } while (unlikely(!res)); - res = temp & BIT(bit); + res = (temp & BIT(bit)) != 0; } smp_llsc_mb(); - return res != 0; + return res; } /* @@ -335,6 +337,8 @@ static inline int test_and_clear_bit(unsigned long nr, : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "ir" (BIT(bit)) : __LLSC_CLOBBER); + + res = res != 0; } else if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(nr)) { loongson_llsc_mb(); do { @@ -363,12 +367,12 @@ static inline int test_and_clear_bit(unsigned long nr, : __LLSC_CLOBBER); } while (unlikely(!res)); - res = temp & BIT(bit); + res = (temp & BIT(bit)) != 0; } smp_llsc_mb(); - return res != 0; + return res; } /* @@ -403,6 +407,8 @@ static inline int test_and_change_bit(unsigned long nr, : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res) : "ir" (BIT(bit)) : __LLSC_CLOBBER); + + res = res != 0; } else { loongson_llsc_mb(); do { @@ -418,12 +424,12 @@ static inline int test_and_change_bit(unsigned long nr, : __LLSC_CLOBBER); } while (unlikely(!res)); - res = temp & BIT(bit); + res = (temp & BIT(bit)) != 0; } smp_llsc_mb(); - return res != 0; + return res; } #include <asm-generic/bitops/non-atomic.h> |