diff options
author | Vladimir Zapolskiy <vz@mleia.com> | 2016-04-25 04:00:38 +0300 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2016-05-11 10:12:11 +0100 |
commit | 8cb17b5ed0177d1b613aadd53c7e570b81625728 (patch) | |
tree | b9fd1a3cdcafec5d09ef1c83ed664c73903c5532 /arch | |
parent | f86c4fbd930ff6fecf3d8a1c313182bd0f49f496 (diff) |
irqchip: Add LPC32xx interrupt controller driver
The change adds improved support of NXP LPC32xx MIC, SIC1 and SIC2
interrupt controllers.
This is a list of new features in comparison to the legacy driver:
* irq types are taken from device tree settings, no more need to
hardcode them,
* old driver is based on irq_domain_add_legacy, which causes problems
with handling MIC hardware interrupt 0 produced by SIC1,
* there is one driver for MIC, SIC1 and SIC2, no more need to handle
them separately, e.g. have two separate handlers for SIC1 and SIC2,
* the driver does not have any dependencies on hardcoded register
offsets,
* the driver is much simpler for maintenance,
* SPARSE_IRQS option is supported.
Legacy LPC32xx interrupt controller driver was broken since commit
76ba59f8366f ("genirq: Add irq_domain-aware core IRQ handler"), which
requires a private interrupt handler, otherwise any SIC1 generated
interrupt (mapped to MIC hwirq 0) breaks the kernel with the message
"unexpected IRQ trap at vector 00".
The change disables compilation of a legacy driver found at
arch/arm/mach-lpc32xx/irq.c, the file will be removed in a separate
commit.
Fixes: 76ba59f8366f ("genirq: Add irq_domain-aware core IRQ handler")
Tested-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/phy3250.c | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cdfa6c2b7626..6684af91cb73 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -531,6 +531,8 @@ config ARCH_LPC32XX select COMMON_CLK select CPU_ARM926T select GENERIC_CLOCKEVENTS + select MULTI_IRQ_HANDLER + select SPARSE_IRQ select USE_OF help Support for the NXP LPC32XX family of processors diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index b2f9e226febe..f9209d091c4b 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -206,7 +206,6 @@ static const char *const lpc32xx_dt_compat[] __initconst = { DT_MACHINE_START(LPC32XX_DT, "LPC32XX SoC (Flattened Device Tree)") .atag_offset = 0x100, .map_io = lpc32xx_map_io, - .init_irq = lpc32xx_init_irq, .init_machine = lpc3250_machine_init, .dt_compat = lpc32xx_dt_compat, MACHINE_END |