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authorSimon Horman <horms+renesas@verge.net.au>2016-07-21 08:44:08 +0900
committerSimon Horman <horms+renesas@verge.net.au>2016-08-08 12:53:06 +0200
commit83701e00ded47e7f6390c6a123209426565046b7 (patch)
tree04e0c215a8c51166c3a05f31ec9991eba2a6f07e /arch
parent38584104eafb6ed40ca06c8421dcc369c9015c1d (diff)
ARM: dts: r8a7794: Correct SDHI register size
r8a7794 SDHI ch0 has SD_DMACR which is located in 0x324. This patch updates register size Based on work for the r8a7790 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 685f986cf962..55737bca4e63 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -697,7 +697,7 @@
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7794";
- reg = <0 0xee100000 0 0x200>;
+ reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp3_clks R8A7794_CLK_SDHI0>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,