diff options
author | Marc Zyngier <maz@kernel.org> | 2021-03-18 09:43:03 +0000 |
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committer | Marc Zyngier <maz@kernel.org> | 2021-03-18 13:57:28 +0000 |
commit | 71ce1ae56e4d43a0c568e2d4bfb154cd15306a82 (patch) | |
tree | 7178b3428149bcd70d815ddcdb61e8e1d9bef707 /arch | |
parent | 468f3477ef8bda1beeb91dd7f423c9bc248ac39d (diff) |
arm64: sve: Provide a conditional update accessor for ZCR_ELx
A common pattern is to conditionally update ZCR_ELx in order
to avoid the "self-synchronizing" effect that writing to this
register has.
Let's provide an accessor that does exactly this.
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm64/include/asm/fpsimd.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index bec5f14b622a..05c9c55768b8 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -130,6 +130,15 @@ static inline void sve_user_enable(void) sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_ZEN_EL0EN); } +#define sve_cond_update_zcr_vq(val, reg) \ + do { \ + u64 __zcr = read_sysreg_s((reg)); \ + u64 __new = __zcr & ~ZCR_ELx_LEN_MASK; \ + __new |= (val) & ZCR_ELx_LEN_MASK; \ + if (__zcr != __new) \ + write_sysreg_s(__new, (reg)); \ + } while (0) + /* * Probing and setup functions. * Calls to these functions must be serialised with one another. |