diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2011-06-20 21:26:06 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-12-07 22:02:45 +0000 |
| commit | 54eed4c77ca1d02228f07bee74a1afe081393ab0 (patch) | |
| tree | 5dede063a5ec57facde120c90df3e20202a9c4b8 /arch | |
| parent | 7ee15d8a2837841d75f56319b94510ed950094b5 (diff) | |
MIPS: ath79: Add AR933X specific IRQ initialization
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2530/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/ath79/irq.c | 5 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 5 |
2 files changed, 9 insertions, 1 deletions
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index 0d98114cbf4d..1b073de44680 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c @@ -129,7 +129,7 @@ static void __init ath79_misc_irq_init(void) if (soc_is_ar71xx() || soc_is_ar913x()) ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; - else if (soc_is_ar724x()) + else if (soc_is_ar724x() || soc_is_ar933x()) ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; else BUG(); @@ -186,6 +186,9 @@ void __init arch_init_irq(void) } else if (soc_is_ar913x()) { ath79_ip2_flush_reg = AR913X_DDR_REG_FLUSH_WMAC; ath79_ip3_flush_reg = AR913X_DDR_REG_FLUSH_USB; + } else if (soc_is_ar933x()) { + ath79_ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC; + ath79_ip3_flush_reg = AR933X_DDR_REG_FLUSH_USB; } else BUG(); diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index c7159e3479c2..9c76185801d0 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -82,6 +82,11 @@ #define AR913X_DDR_REG_FLUSH_USB 0x84 #define AR913X_DDR_REG_FLUSH_WMAC 0x88 +#define AR933X_DDR_REG_FLUSH_GE0 0x7c +#define AR933X_DDR_REG_FLUSH_GE1 0x80 +#define AR933X_DDR_REG_FLUSH_USB 0x84 +#define AR933X_DDR_REG_FLUSH_WMAC 0x88 + /* * PLL block */ |