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authorDavid S. Miller <davem@davemloft.net>2012-08-28 20:55:19 -0700
committerDavid S. Miller <davem@davemloft.net>2012-08-28 20:55:19 -0700
commit45dfe237a865368929534ec75fe5f26c151c88d9 (patch)
treefc79f99fad778fbec978932f9bf7d08e9410102d /arch
parent81658ad0d92306ceb271994b90cd49ffde10eeda (diff)
sparc64: Use fsrc2 instead of fsrc1 in sparc64 hash crypto drivers.
On SPARC-T4 fsrc2 has 1 cycle of latency, whereas fsrc1 has 11 cycles. True story. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/sparc/crypto/md5_asm.S2
-rw-r--r--arch/sparc/crypto/sha1_asm.S2
-rw-r--r--arch/sparc/crypto/sha256_asm.S2
-rw-r--r--arch/sparc/crypto/sha512_asm.S2
4 files changed, 4 insertions, 4 deletions
diff --git a/arch/sparc/crypto/md5_asm.S b/arch/sparc/crypto/md5_asm.S
index 220b73baa551..ff90903180eb 100644
--- a/arch/sparc/crypto/md5_asm.S
+++ b/arch/sparc/crypto/md5_asm.S
@@ -62,7 +62,7 @@ ENTRY(md5_sparc64_transform)
.word 0x81b02800
subcc %o2, 1, %o2
- fsrc1 %f26, %f10
+ fsrc2 %f26, %f10
bne,pt %xcc, 1b
add %o1, 0x40, %o1
diff --git a/arch/sparc/crypto/sha1_asm.S b/arch/sparc/crypto/sha1_asm.S
index d2147eb054c1..3cd218ac631b 100644
--- a/arch/sparc/crypto/sha1_asm.S
+++ b/arch/sparc/crypto/sha1_asm.S
@@ -64,7 +64,7 @@ ENTRY(sha1_sparc64_transform)
.word 0x81b02820
subcc %o2, 1, %o2
- fsrc1 %f26, %f10
+ fsrc2 %f26, %f10
bne,pt %xcc, 1b
add %o1, 0x40, %o1
diff --git a/arch/sparc/crypto/sha256_asm.S b/arch/sparc/crypto/sha256_asm.S
index 771ce265f64a..9da84f5b61f5 100644
--- a/arch/sparc/crypto/sha256_asm.S
+++ b/arch/sparc/crypto/sha256_asm.S
@@ -70,7 +70,7 @@ ENTRY(sha256_sparc64_transform)
.word 0x81b02840
subcc %o2, 1, %o2
- fsrc1 %f26, %f10
+ fsrc2 %f26, %f10
bne,pt %xcc, 1b
add %o1, 0x40, %o1
diff --git a/arch/sparc/crypto/sha512_asm.S b/arch/sparc/crypto/sha512_asm.S
index 04244da50774..650ba5742f0e 100644
--- a/arch/sparc/crypto/sha512_asm.S
+++ b/arch/sparc/crypto/sha512_asm.S
@@ -94,7 +94,7 @@ ENTRY(sha512_sparc64_transform)
.word 0x81b02860
subcc %o2, 1, %o2
- fsrc1 %f50, %f18
+ fsrc2 %f50, %f18
bne,pt %xcc, 1b
add %o1, 0x80, %o1