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authorYinbo Zhu <yinbo.zhu@nxp.com>2019-12-13 10:18:39 +0800
committerShawn Guo <shawnguo@kernel.org>2019-12-23 14:48:48 +0800
commit33eae7fb2e593fdbaac15d843e2558379c6d1149 (patch)
tree0fe3c0c8667ac3ca2c65a11aebe396f0c2083558 /arch
parent7d7778b1396bc9e2a3875009af522beb4ea9355a (diff)
arm64: dts: ls1028a: fix endian setting for dcfg
DCFG block uses little endian. Fix it so that register access becomes correct. Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Acked-by: Yangbo Lu <yangbo.lu@nxp.com> Fixes: 8897f3255c9c ("arm64: dts: Add support for NXP LS1028A SoC") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 13a3cbe89b5a..a6f9b7784e8f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -175,7 +175,7 @@
dcfg: syscon@1e00000 {
compatible = "fsl,ls1028a-dcfg", "syscon";
reg = <0x0 0x1e00000 0x0 0x10000>;
- big-endian;
+ little-endian;
};
rst: syscon@1e60000 {