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| author | Naidu Tellapati <naidu.tellapati@imgtec.com> | 2015-05-08 18:47:31 -0300 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2015-05-19 16:07:40 +0200 |
| commit | 1e70897d0e20f988abedcf73b33684ecd2be9511 (patch) | |
| tree | 36e3625bf964d0a435c84165b1571ac3da669199 /arch | |
| parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
pwm: img: Impose upper and lower timebase steps value
The PWM hardware on Pistachio platform has a maximum timebase steps
value to 255. To fix it, let's introduce a compatible-specific
data structure to contain the SoC-specific details and use it to
specify a maximum timebase.
Also, let's limit the minimum timebase to 16 steps, to allow a sane
range of duty cycle steps.
Fixes: 277bb6a29e00 ("pwm: Imagination Technologies PWM DAC driver")
Signed-off-by: Naidu Tellapati <naidu.tellapati@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions