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authorTony Luck <tony.luck@intel.com>2018-06-08 09:07:32 -0700
committerThomas Gleixner <tglx@linutronix.de>2018-06-09 16:04:34 +0200
commit1d9f3e20a56d33e55748552aeec597f58542f92d (patch)
treed04fb94c7aa63b502938e7a33d2b6fc200b56a83 /arch
parenta07771ac6a78860777a9da5d9bc38830ec993fe7 (diff)
x86/intel_rdt: Enable CMT and MBM on new Skylake stepping
New stepping of Skylake has fixes for cache occupancy and memory bandwidth monitoring. Update the code to enable these by default on newer steppings. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: stable@vger.kernel.org # v4.14 Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com> Link: https://lkml.kernel.org/r/20180608160732.9842-1-tony.luck@intel.com
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/cpu/intel_rdt.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c
index 589b948e6e01..316a8875bd90 100644
--- a/arch/x86/kernel/cpu/intel_rdt.c
+++ b/arch/x86/kernel/cpu/intel_rdt.c
@@ -821,6 +821,8 @@ static __init void rdt_quirks(void)
case INTEL_FAM6_SKYLAKE_X:
if (boot_cpu_data.x86_stepping <= 4)
set_rdt_options("!cmt,!mbmtotal,!mbmlocal,!l3cat");
+ else
+ set_rdt_options("!l3cat");
}
}