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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2013-10-08 16:38:53 +0200
committerDaniel Lezcano <daniel.lezcano@linaro.org>2013-11-20 21:55:20 +0100
commit1c283531115bda77a9b559271311c1983fbcffaa (patch)
tree6308373b50a5fe9554ff9652e6e6c15f8eae7e7e /arch
parent050ded1bbaea3331745cf2782315f5bc2582d083 (diff)
ARM: at91: rm9200: switch back to clockevents_config_and_register
The timer code for at91rm9200 was already converted some time ago by Shawn Guo in commit 838a2ae (ARM: use clockevents_config_and_register() where possible) but because of a rounding issue in the timer core this resulted in an easily reproducible oops. So it was reverted (commit b7a8ca5 (ARM: at91: rm9200 fix time support)) which stopped the oops from happening because min_delta_ns is increased by one in arch code which stopped from problem from happening. Now that the timer core problem is fixed (commit a4578ea (clockevents: Sanitize ticks to nsec conversion)), we can switch back to the clockevents_config_and_register helper. Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index f607deb40f4d..bc7b363a3083 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -174,7 +174,6 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
static struct clock_event_device clkevt = {
.name = "at91_tick",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .shift = 32,
.rating = 150,
.set_next_event = clkevt32k_next_event,
.set_mode = clkevt32k_mode,
@@ -265,11 +264,9 @@ void __init at91rm9200_timer_init(void)
at91_st_write(AT91_ST_RTMR, 1);
/* Setup timer clockevent, with minimum of two ticks (important!!) */
- clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
- clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
- clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
clkevt.cpumask = cpumask_of(0);
- clockevents_register_device(&clkevt);
+ clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
+ 2, AT91_ST_ALMV);
/* register clocksource */
clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);