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authorMichael Neuling <mikey@neuling.org>2016-02-19 11:16:23 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2016-02-22 20:47:47 +1100
commit15b1624b78075d4f52e170600c81720532ca790d (patch)
tree57774c10592dc1b9b664473183975485ac80792d /arch
parentce5732a28dd09956540f61ba9d902b63e73a1232 (diff)
powerpc: Use defines for __init_tlb_power[78]
Use defines for literals __init_tlb_power[78] rather than hand coding them. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kernel/cpu_setup_power.S5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index 9c9b7411b28b..cb3e272a659b 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -15,6 +15,7 @@
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
#include <asm/cache.h>
+#include <asm/mmu-hash64.h>
/* Entry: r3 = crap, r4 = ptr to cputable entry
*
@@ -139,7 +140,7 @@ __init_HFSCR:
* (invalidate by congruence class). P7 has 128 CCs., P8 has 512.
*/
__init_tlb_power7:
- li r6,128
+ li r6,POWER7_TLB_SETS
mtctr r6
li r7,0xc00 /* IS field = 0b11 */
ptesync
@@ -150,7 +151,7 @@ __init_tlb_power7:
1: blr
__init_tlb_power8:
- li r6,512
+ li r6,POWER8_TLB_SETS
mtctr r6
li r7,0xc00 /* IS field = 0b11 */
ptesync