diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2018-12-05 12:48:19 -0800 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2018-12-05 12:53:07 -0800 |
| commit | 037602705109ec2ab96340bea93ad87daa3ac046 (patch) | |
| tree | 616c10e2e60b8a6bfbe388366ea1c1c3f170dafb /arch/xtensa/boot/boot-elf | |
| parent | f37598be4e3896359e87c824be57ddddc280cc3f (diff) | |
xtensa: don't use l32r opcode directly
xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/boot/boot-elf')
| -rw-r--r-- | arch/xtensa/boot/boot-elf/bootstrap.S | 29 |
1 files changed, 14 insertions, 15 deletions
diff --git a/arch/xtensa/boot/boot-elf/bootstrap.S b/arch/xtensa/boot/boot-elf/bootstrap.S index 29c68426ab56..99e98c9bae41 100644 --- a/arch/xtensa/boot/boot-elf/bootstrap.S +++ b/arch/xtensa/boot/boot-elf/bootstrap.S @@ -29,17 +29,7 @@ _ResetVector: .begin no-absolute-literals .literal_position -#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \ - XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY - .literal RomInitAddr, CONFIG_KERNEL_LOAD_ADDRESS -#else - .literal RomInitAddr, KERNELOFFSET -#endif -#ifndef CONFIG_PARSE_BOOTPARAM - .literal RomBootParam, 0 -#else - .literal RomBootParam, _bootparam - +#ifdef CONFIG_PARSE_BOOTPARAM .align 4 _bootparam: .short BP_TAG_FIRST @@ -66,13 +56,22 @@ _SetupMMU: initialize_mmu #endif - .end no-absolute-literals - rsil a0, XCHAL_DEBUGLEVEL-1 rsync reset: - l32r a0, RomInitAddr - l32r a2, RomBootParam +#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \ + XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY + movi a0, CONFIG_KERNEL_LOAD_ADDRESS +#else + movi a0, KERNELOFFSET +#endif +#ifdef CONFIG_PARSE_BOOTPARAM + movi a2, _bootparam +#else + movi a2, 0 +#endif movi a3, 0 movi a4, 0 jx a0 + + .end no-absolute-literals |