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authorZhao Yakui <yakui.zhao@intel.com>2007-11-15 17:06:36 +0800
committerLen Brown <len.brown@intel.com>2007-11-16 21:46:25 -0500
commitf79f06ab9f86d7203006d2ec8992ac80df36a34e (patch)
treee7436b83e6315c1c28dd6cbe7fac6c0decd4ecea /arch/x86
parent0ac3c571315a53c14d2733564f14ebdb911fe903 (diff)
ACPI: Enable MSR (FixedHW) support for T-States
Add throttling control via MSR when T-states uses the FixHW Control Status registers. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Li Shaohua <shaohua.li@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/acpi/processor.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kernel/acpi/processor.c b/arch/x86/kernel/acpi/processor.c
index f63e5ff0aca1..a25db514c719 100644
--- a/arch/x86/kernel/acpi/processor.c
+++ b/arch/x86/kernel/acpi/processor.c
@@ -49,6 +49,9 @@ static void init_intel_pdc(struct acpi_processor *pr, struct cpuinfo_x86 *c)
if (cpu_has(c, X86_FEATURE_EST))
buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
+ if (cpu_has(c, X86_FEATURE_ACPI))
+ buf[2] |= ACPI_PDC_T_FFH;
+
obj->type = ACPI_TYPE_BUFFER;
obj->buffer.length = 12;
obj->buffer.pointer = (u8 *) buf;