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authorMathias Nyman <mathias.nyman@linux.intel.com>2013-09-13 17:02:29 +0300
committerIngo Molnar <mingo@kernel.org>2013-09-14 08:06:28 +0200
commit0f531431d3de88efb4234d6c0ce22089ec035a38 (patch)
tree87aa84b3c5876075fcb46a69887c56b0f78e064a /arch/x86/kernel
parent9d8e3f9693245415db0b7c58551a91fa9fd1f9c7 (diff)
x86/intel/lpss: Add pin control support to Intel low power subsystem
x86 chips with LPSS (low power subsystem) such as Lynxpoint and Baytrail have SoC like peripheral support and controllable pins. At the moment, Baytrail needs the pinctrl-baytrail driver to let peripherals control their gpio resources, but more pincontrol functions such as pin muxing and grouping are possible to add later. Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: http://lkml.kernel.org/r/1379080949-21734-1-git-send-email-mathias.nyman@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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