diff options
| author | Dou Liyang <douly.fnst@cn.fujitsu.com> | 2017-09-13 17:12:54 +0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2017-09-25 15:03:17 +0200 |
| commit | 935356cecda851d94381e1c6fea9dec443f908fe (patch) | |
| tree | 5a9d6e6011c935118382468e8e92a0e06f7f5e7c /arch/x86/kernel/time.c | |
| parent | 34fba3e6b1e5d42c81fc00ede715e0cdd2ebfada (diff) | |
x86/apic: Initialize interrupt mode after timer init
A cold or warm boot through BIOS sets the APIC in default interrupt
delivery mode. A dump-capture kernel will not go through a BIOS reset and
leave the interrupt delivery mode in the state which was active on the
crashed kernel, but the dump kernel startup code assumes default delivery
mode which can result in interrupt delivery/handling to fail.
To solve this problem, it's required to set up the final interrupt delivery
mode as soon as possible. As IOAPIC setup needs the timer initialized for
verifying the timer interrupt delivery mode, the earliest point is right
after timer setup in late_time_init().
That results in the following init order:
1) Set up the legacy timer, if applicable on the platform
2) Set up APIC/IOAPIC which includes the verification of the legacy timer
interrupt delivery.
3) TSC calibration
4) Local APIC timer setup
Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: yinghai@kernel.org
Cc: bhe@redhat.com
Link: https://lkml.kernel.org/r/1505293975-26005-12-git-send-email-douly.fnst@cn.fujitsu.com
Diffstat (limited to 'arch/x86/kernel/time.c')
| -rw-r--r-- | arch/x86/kernel/time.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/kernel/time.c b/arch/x86/kernel/time.c index e0754cdbad37..3ceb834233c8 100644 --- a/arch/x86/kernel/time.c +++ b/arch/x86/kernel/time.c @@ -84,6 +84,11 @@ void __init hpet_time_init(void) static __init void x86_late_time_init(void) { x86_init.timers.timer_init(); + /* + * After PIT/HPET timers init, select and setup + * the final interrupt mode for delivering IRQs. + */ + x86_init.irqs.intr_mode_init(); tsc_init(); } |