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authorIngo Molnar <mingo@elte.hu>2008-12-17 09:09:13 +0100
committerIngo Molnar <mingo@elte.hu>2008-12-23 12:45:10 +0100
commiteb2b861810d4ff72454c83996b891df4e0aaff9a (patch)
tree9b99f1ec88cd3a248425a6370c700aca2db9b759 /arch/x86/include/asm/perf_counter.h
parent5c167b8585c8d91206b395d57011ead7711e322f (diff)
x86, perfcounters: prepare for fixed-mode PMCs
Impact: refactor the x86 code for fixed-mode PMCs Extend the data structures and rename the existing facilities to allow for a 'generic' versus 'fixed' counter distinction. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/perf_counter.h')
-rw-r--r--arch/x86/include/asm/perf_counter.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/x86/include/asm/perf_counter.h b/arch/x86/include/asm/perf_counter.h
index 9dadce1124ee..dd5a4a559e2d 100644
--- a/arch/x86/include/asm/perf_counter.h
+++ b/arch/x86/include/asm/perf_counter.h
@@ -1,6 +1,13 @@
#ifndef _ASM_X86_PERF_COUNTER_H
#define _ASM_X86_PERF_COUNTER_H
+/*
+ * Performance counter hw details:
+ */
+
+#define X86_PMC_MAX_GENERIC 8
+#define X86_PMC_MAX_FIXED 3
+
#define MSR_ARCH_PERFMON_PERFCTR0 0xc1
#define MSR_ARCH_PERFMON_PERFCTR1 0xc2
@@ -20,6 +27,10 @@
#define ARCH_PERFMON_BRANCH_MISSES_RETIRED 6
+/*
+ * Intel "Architectural Performance Monitoring" CPUID
+ * detection/enumeration details:
+ */
union cpuid10_eax {
struct {
unsigned int version_id:8;