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authorAndrea Gelmini <andrea.gelmini@gelma.net>2016-05-21 14:10:49 +0200
committerChris Metcalf <cmetcalf@mellanox.com>2016-05-23 12:17:22 -0400
commit94ceaf381d09e9f1f5ba4b621ea0f0c11c77a6fc (patch)
tree4651c71c1f590f9e246f21fac0ce30d7bab37d79 /arch/tile/kernel
parenta87e2cdc21332592fc1c62041cfcb85111f6df5e (diff)
Fix typo
Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Chris Metcalf <cmetcalf@mellanox.com>
Diffstat (limited to 'arch/tile/kernel')
-rw-r--r--arch/tile/kernel/pci_gx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index aa2b44cd8fd3..0e7a5d09e023 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -40,7 +40,7 @@
#include <arch/sim.h>
/*
- * This file containes the routines to search for PCI buses,
+ * This file contains the routines to search for PCI buses,
* enumerate the buses, and configure any attached devices.
*/
@@ -434,7 +434,7 @@ int __init tile_pci_init(void)
/*
* Now determine which PCIe ports are configured to operate in RC
- * mode. There is a differece in the port configuration capability
+ * mode. There is a difference in the port configuration capability
* between the Gx36 and Gx72 devices.
*
* The Gx36 has configuration capability for each of the 3 PCIe