diff options
| author | Chris Metcalf <cmetcalf@tilera.com> | 2011-11-02 23:02:17 -0400 |
|---|---|---|
| committer | Chris Metcalf <cmetcalf@tilera.com> | 2011-11-03 16:58:54 -0400 |
| commit | eb7c792da5afa3b9ec3e802c30952f82d2e9722b (patch) | |
| tree | db796193297d4cc14bdb4d2b8001750a1f515f17 /arch/tile/kernel/single_step.c | |
| parent | aeddea5d37d86d38c7a347110d8a052e9f45d955 (diff) | |
arch/tile: factor out <arch/opcode.h> header
The kernel code was using some <asm> headers that included a mix
of hardware-specific information (typically found in Tilera <arch>
headers) and structures, enums, and function declarations supporting
the disassembly function of the tile-desc.c sources.
This change refactors that code so that a hardware-specific, but
OS- and application-agnostic header, is created: <arch/opcode.h>.
This header is then exported to userspace along with the other
<arch> headers and can be used to build userspace code; in particular,
it is used by glibc as part of implementing the backtrace() function.
The new header, together with a header that specifically describes
the disassembly code (<asm/tile-desc.h> with _32 and _64 variants),
replaces the old <asm/opcode-tile*.h> and <asm/opcode_constants*.h>
headers.
As part of this change, we are also renaming the 32-bit constants
from TILE_xxx to TILEPRO_xxx to better reflect the fact that they
are specific to the TILEPro architecture, and not to TILE-Gx
and any successor "tile" architecture chips.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/kernel/single_step.c')
| -rw-r--r-- | arch/tile/kernel/single_step.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/tile/kernel/single_step.c b/arch/tile/kernel/single_step.c index 4032ca8e51b6..b7a879504086 100644 --- a/arch/tile/kernel/single_step.c +++ b/arch/tile/kernel/single_step.c @@ -25,9 +25,8 @@ #include <linux/types.h> #include <linux/err.h> #include <asm/cacheflush.h> -#include <asm/opcode-tile.h> -#include <asm/opcode_constants.h> #include <arch/abi.h> +#include <arch/opcode.h> #define signExtend17(val) sign_extend((val), 17) #define TILE_X1_MASK (0xffffffffULL << 31) @@ -118,7 +117,7 @@ static tile_bundle_bits rewrite_load_store_unaligned( int val_reg, addr_reg, err, val; /* Get address and value registers */ - if (bundle & TILE_BUNDLE_Y_ENCODING_MASK) { + if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK) { addr_reg = get_SrcA_Y2(bundle); val_reg = get_SrcBDest_Y2(bundle); } else if (mem_op == MEMOP_LOAD || mem_op == MEMOP_LOAD_POSTINCR) { @@ -229,7 +228,7 @@ P("\n"); } ++unaligned_fixup_count; - if (bundle & TILE_BUNDLE_Y_ENCODING_MASK) { + if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK) { /* Convert the Y2 instruction to a prefetch. */ bundle &= ~(create_SrcBDest_Y2(-1) | create_Opcode_Y2(-1)); @@ -389,7 +388,7 @@ void single_step_once(struct pt_regs *regs) state->branch_next_pc = 0; state->update = 0; - if (!(bundle & TILE_BUNDLE_Y_ENCODING_MASK)) { + if (!(bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)) { /* two wide, check for control flow */ int opcode = get_Opcode_X1(bundle); |