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authorDavid S. Miller <davem@davemloft.net>2013-09-18 15:39:06 -0700
committerDavid S. Miller <davem@davemloft.net>2013-11-12 15:22:34 -0800
commitbb7b435388b9f035ecfb16f42b5c6bf428359c63 (patch)
tree5e64fe2772da7d787f88a6e7854db642c2dc2bb1 /arch/sparc/include
parente0a45e3580a033669b24b04c3535515d69bb9702 (diff)
sparc64: Document the shift counts used to validate linear kernel addresses.
This way we can see exactly what they are derived from, and in particular how they would change if we were to use a different PAGE_OFFSET value. Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Bob Picco <bob.picco@oracle.com>
Diffstat (limited to 'arch/sparc/include')
-rw-r--r--arch/sparc/include/asm/page_64.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/page_64.h b/arch/sparc/include/asm/page_64.h
index 9dd0f7360822..978ea6d022e9 100644
--- a/arch/sparc/include/asm/page_64.h
+++ b/arch/sparc/include/asm/page_64.h
@@ -121,6 +121,22 @@ typedef pte_t *pgtable_t;
#define PAGE_OFFSET_BY_BITS(X) (-(_AC(1,UL) << (X)))
#define PAGE_OFFSET PAGE_OFFSET_BY_BITS(MAX_SUPPORTED_PA_BITS)
+/* The "virtual" portion of PAGE_OFFSET, used to clip off the non-physical
+ * bits of a linear kernel address.
+ */
+#define PAGE_OFFSET_VA_BITS (64 - MAX_SUPPORTED_PA_BITS)
+
+/* The actual number of physical memory address bits we support, this is
+ * used to size various tables used to manage kernel TLB misses.
+ */
+#define MAX_PHYS_ADDRESS_BITS 41
+
+/* These two shift counts are used when indexing sparc64_valid_addr_bitmap
+ * and kpte_linear_bitmap.
+ */
+#define ILOG2_4MB 22
+#define ILOG2_256MB 28
+
#ifndef __ASSEMBLY__
#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)