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authorMagnus Damm <damm@igel.co.jp>2009-05-28 12:52:29 +0000
committerPaul Mundt <lethal@linux-sh.org>2009-06-01 18:05:37 +0900
commit6881e8bf3d86b23dd124134fae113ebd05fae08a (patch)
tree3945557723d26014b6071ceaf5729952cec8a8e9 /arch/sh/kernel
parent98fbe45bea77c1804eae0e71f27673db1824a2a8 (diff)
sh: shared mstp32 clock code
Add shared 32-bit module stop bit clock support. Processor specific code can use SH_CLK_MSTP32() to initialize module stop bit clocks, and then use sh_clk_mstp32() for registration. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r--arch/sh/kernel/cpu/clock-cpg.c35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
index b78c237ab366..72228d2945ac 100644
--- a/arch/sh/kernel/cpu/clock-cpg.c
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -1,7 +1,42 @@
#include <linux/clk.h>
#include <linux/compiler.h>
+#include <linux/io.h>
#include <asm/clock.h>
+static int sh_clk_mstp32_enable(struct clk *clk)
+{
+ __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit),
+ clk->enable_reg);
+ return 0;
+}
+
+static void sh_clk_mstp32_disable(struct clk *clk)
+{
+ __raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit),
+ clk->enable_reg);
+}
+
+static struct clk_ops sh_clk_mstp32_clk_ops = {
+ .enable = sh_clk_mstp32_enable,
+ .disable = sh_clk_mstp32_disable,
+ .recalc = followparent_recalc,
+};
+
+int __init sh_clk_mstp32_register(struct clk *clks, int nr)
+{
+ struct clk *clkp;
+ int ret = 0;
+ int k;
+
+ for (k = 0; !ret && (k < nr); k++) {
+ clkp = clks + k;
+ clkp->ops = &sh_clk_mstp32_clk_ops;
+ ret |= clk_register(clkp);
+ }
+
+ return ret;
+}
+
#ifdef CONFIG_SH_CLK_CPG_LEGACY
static struct clk master_clk = {
.name = "master_clk",