diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2011-11-21 21:33:18 -0800 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-11-24 17:15:23 +0900 |
commit | 56242a1fc595d158eddefbb4d6d76e82c2535f55 (patch) | |
tree | 78964e2ccde88e09ebb12412de26ab58f7b1417b /arch/sh/kernel | |
parent | a9098b372606a15745cdeb012de4ee91c0df82c4 (diff) |
sh: clkfwk: setup clock parent from current register value
Some clocks can select its parent clock by CPG register.
But it might have been modified by boot-loader or something.
This patch removed fixed initial parent clock,
and setup it from their current register settings.
It works on div6 reparent clocks for now.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 8668f557e0ac..77118387f1cf 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c @@ -189,9 +189,9 @@ static struct clk *fclkbcr_parent[] = { }; static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { - [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0, + [DIV6_FA] = SH_CLK_DIV6_EXT(FCLKACR, 0, fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2), - [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0, + [DIV6_FB] = SH_CLK_DIV6_EXT(FCLKBCR, 0, fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2), }; |