diff options
author | Paul Mundt <lethal@linux-sh.org> | 2007-09-27 18:18:39 +0900 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-09-27 18:18:39 +0900 |
commit | cb7af21f7d370edb3a6a6d3e15cb17c8fd61591e (patch) | |
tree | 9042e4b322593adc3864b28a8c0899d7af7a52da /arch/sh/kernel/cpu/sh2a/probe.c | |
parent | c3af39758ce49b79570ab5ff2f64e0ea5fd82c9b (diff) |
sh: Use boot_cpu_data for CPU probe.
This moves off of smp_processor_id() and only sets the probe
information for the boot CPU directly. This will be copied out
for the secondaries, so there's no reason to do this each time.
This also allows for some header tidying.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh2a/probe.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/probe.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c index f455c3509789..6d02465704b9 100644 --- a/arch/sh/kernel/cpu/sh2a/probe.c +++ b/arch/sh/kernel/cpu/sh2a/probe.c @@ -17,15 +17,15 @@ int __init detect_cpu_and_cache_system(void) { /* Just SH7206 for now .. */ - current_cpu_data.type = CPU_SH7206; - current_cpu_data.flags |= CPU_HAS_OP32; + boot_cpu_data.type = CPU_SH7206; + boot_cpu_data.flags |= CPU_HAS_OP32; - current_cpu_data.dcache.ways = 4; - current_cpu_data.dcache.way_incr = (1 << 11); - current_cpu_data.dcache.sets = 128; - current_cpu_data.dcache.entry_shift = 4; - current_cpu_data.dcache.linesz = L1_CACHE_BYTES; - current_cpu_data.dcache.flags = 0; + boot_cpu_data.dcache.ways = 4; + boot_cpu_data.dcache.way_incr = (1 << 11); + boot_cpu_data.dcache.sets = 128; + boot_cpu_data.dcache.entry_shift = 4; + boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; + boot_cpu_data.dcache.flags = 0; /* * The icache is the same as the dcache as far as this setup is @@ -33,7 +33,7 @@ int __init detect_cpu_and_cache_system(void) * lacks the U bit that the dcache has, none of this has any bearing * on the cache info. */ - current_cpu_data.icache = current_cpu_data.dcache; + boot_cpu_data.icache = boot_cpu_data.dcache; return 0; } |