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authorVasily Gorbik <gor@linux.vnet.ibm.com>2018-01-10 11:07:31 +0100
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2018-01-23 07:36:46 +0100
commit34ba2450abe3b0a90aa91884531b6cdca6e0da92 (patch)
tree218b4b21db428546d598966f4628c7476a4b034c /arch/s390
parent87b970f453d07896c6a94146e5c6769323d06c7b (diff)
s390/head: replace hard coded values with constants
A couple of the low core offsets are repeatedly used throughout head.S and are hard coded. Replace them with corresponding constants from asm-offsets.h to improve readability. Signed-off-by: Vasily Gorbik <gor@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390')
-rw-r--r--arch/s390/kernel/head.S10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index b86fa3ee4927..5c42f16a54c4 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -66,7 +66,7 @@ __HEAD
# subroutine to wait for end I/O
#
.Lirqwait:
- mvc 0x1f0(16),.Lnewpsw # set up IO interrupt psw
+ mvc __LC_IO_NEW_PSW(16),.Lnewpsw # set up IO interrupt psw
lpsw .Lwaitpsw
.Lioint:
br %r14
@@ -98,7 +98,7 @@ __HEAD
bnz .Llderr
.Lwait4irq:
bas %r14,.Lirqwait
- c %r1,0xb8 # compare subchannel number
+ c %r1,__LC_SUBCHANNEL_ID # compare subchannel number
bne .Lwait4irq
tsch 0(%r5)
@@ -156,9 +156,9 @@ iplstart:
.fill 16,4,0x0
0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
sam31 # switch to 31 bit addressing mode
- lh %r1,0xb8 # test if subchannel number
+ lh %r1,__LC_SUBCHANNEL_ID # test if subchannel number
bct %r1,.Lnoload # is valid
- l %r1,0xb8 # load ipl subchannel number
+ l %r1,__LC_SUBCHANNEL_ID # load ipl subchannel number
la %r2,IPL_BS # load start address
bas %r14,.Lloader # load rest of ipl image
l %r12,.Lparm # pointer to parameter area
@@ -239,7 +239,7 @@ iplstart:
bz .Lnoreset
.Lwaitforirq:
bas %r14,.Lirqwait # wait for IO interrupt
- c %r1,0xb8 # compare subchannel number
+ c %r1,__LC_SUBCHANNEL_ID # compare subchannel number
bne .Lwaitforirq
la %r5,.Lirb
tsch 0(%r5)