diff options
author | Heiko Carstens <heiko.carstens@de.ibm.com> | 2017-09-26 16:15:06 +0200 |
---|---|---|
committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2017-09-29 15:52:18 +0200 |
commit | ea7c360b10081a3d0d42a8eab5249f7c2a258b4e (patch) | |
tree | ba0c2231b44085ae03dff1cce3f0c1496c22efa5 /arch/s390/kernel/dis.c | |
parent | 630f789e80fc299a38f44d6b2e65c02ed219b47a (diff) |
s390/disassembler: add missing z13 instructions
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel/dis.c')
-rw-r--r-- | arch/s390/kernel/dis.c | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c index e08c2137a11b..c460e6049fb5 100644 --- a/arch/s390/kernel/dis.c +++ b/arch/s390/kernel/dis.c @@ -113,7 +113,7 @@ enum { INSTR_MII_UPI, INSTR_RIE_R0IU, INSTR_RIE_R0UU, INSTR_RIE_RRP, INSTR_RIE_RRPU, INSTR_RIE_RRUUU, INSTR_RIE_RUPI, INSTR_RIE_RUPU, INSTR_RIE_RRI0, - INSTR_RIL_RI, INSTR_RIL_RP, INSTR_RIL_RU, INSTR_RIL_UP, + INSTR_RIE_RUI0, INSTR_RIL_RI, INSTR_RIL_RP, INSTR_RIL_RU, INSTR_RIL_UP, INSTR_RIS_R0RDU, INSTR_RIS_R0UU, INSTR_RIS_RURDI, INSTR_RIS_RURDU, INSTR_RI_RI, INSTR_RI_RP, INSTR_RI_RU, INSTR_RI_UP, INSTR_RRE_00, INSTR_RRE_0R, INSTR_RRE_AA, INSTR_RRE_AR, INSTR_RRE_F0, @@ -130,7 +130,7 @@ enum { INSTR_RSI_RRP, INSTR_RSL_LRDFU, INSTR_RSL_R0RD, INSTR_RSY_AARD, INSTR_RSY_CCRD, INSTR_RSY_RRRD, INSTR_RSY_RURD, - INSTR_RSY_RDRM, INSTR_RSY_RMRD, + INSTR_RSY_RURD2, INSTR_RSY_RDRM, INSTR_RSY_RMRD, INSTR_RS_AARD, INSTR_RS_CCRD, INSTR_RS_R0RD, INSTR_RS_RRRD, INSTR_RS_RURD, INSTR_RXE_FRRD, INSTR_RXE_RRRD, INSTR_RXE_RRRDM, @@ -241,6 +241,7 @@ static const unsigned char formats[][7] = { [INSTR_RIE_RRPU] = { 0xff, R_8,R_12,U4_32,J16_16,0,0 }, [INSTR_RIE_RRP] = { 0xff, R_8,R_12,J16_16,0,0,0 }, [INSTR_RIE_RRUUU] = { 0xff, R_8,R_12,U8_16,U8_24,U8_32,0 }, + [INSTR_RIE_RUI0] = { 0xff, R_8,I16_16,U4_12,0,0,0 }, [INSTR_RIE_RUPI] = { 0xff, R_8,I8_32,U4_12,J16_16,0,0 }, [INSTR_RIE_RUPU] = { 0xff, R_8,U8_32,U4_12,J16_16,0,0 }, [INSTR_RIL_RI] = { 0x0f, R_8,I32_16,0,0,0,0 }, @@ -303,6 +304,7 @@ static const unsigned char formats[][7] = { [INSTR_RSY_RMRD] = { 0xff, R_8,U4_12,D20_20,B_16,0,0 }, [INSTR_RSY_RRRD] = { 0xff, R_8,R_12,D20_20,B_16,0,0 }, [INSTR_RSY_RURD] = { 0xff, R_8,U4_12,D20_20,B_16,0,0 }, + [INSTR_RSY_RURD2] = { 0xff, R_8,D20_20,B_16,U4_12,0,0 }, [INSTR_RS_AARD] = { 0xff, A_8,A_12,D_20,B_16,0,0 }, [INSTR_RS_CCRD] = { 0xff, C_8,C_12,D_20,B_16,0,0 }, [INSTR_RS_R0RD] = { 0xff, R_8,D_20,B_16,0,0,0 }, @@ -425,6 +427,10 @@ enum { LONG_INSN_LLGFRL, LONG_INSN_LLGHRL, LONG_INSN_LLGTAT, + LONG_INSN_LLZRGF, + LONG_INSN_LOCFHR, + LONG_INSN_LOCGHI, + LONG_INSN_LOCHHI, LONG_INSN_POPCNT, LONG_INSN_RIEMIT, LONG_INSN_RINEXT, @@ -433,6 +439,7 @@ enum { LONG_INSN_RISBLG, LONG_INSN_SLHHHR, LONG_INSN_SLHHLR, + LONG_INSN_STOCFH, LONG_INSN_TABORT, LONG_INSN_TBEGIN, LONG_INSN_TBEGINC, @@ -505,6 +512,7 @@ static char *long_insn_name[] = { [LONG_INSN_LLGFRL] = "llgfrl", [LONG_INSN_LLGHRL] = "llghrl", [LONG_INSN_LLGTAT] = "llgtat", + [LONG_INSN_LLZRGF] = "llzrgf", [LONG_INSN_POPCNT] = "popcnt", [LONG_INSN_RIEMIT] = "riemit", [LONG_INSN_RINEXT] = "rinext", @@ -526,6 +534,10 @@ static char *long_insn_name[] = { [LONG_INSN_VESRLV] = "vesrlv", [LONG_INSN_VSBCBI] = "vsbcbi", [LONG_INSN_STCCTM] = "stcctm", + [LONG_INSN_LOCFHR] = "locfhr", + [LONG_INSN_LOCGHI] = "locghi", + [LONG_INSN_LOCHHI] = "lochhi", + [LONG_INSN_STOCFH] = "stocfh", }; static struct s390_insn opcode[] = { @@ -1101,6 +1113,7 @@ static struct s390_insn opcode_b9[] = { { "lhr", 0x27, INSTR_RRE_RR }, { "cgfr", 0x30, INSTR_RRE_RR }, { "clgfr", 0x31, INSTR_RRE_RR }, + { "ppno", 0x3c, INSTR_RRE_RR }, { "cfdtr", 0x41, INSTR_RRF_UURF }, { { 0, LONG_INSN_CLGDTR }, 0x42, INSTR_RRF_UURF }, { { 0, LONG_INSN_CLFDTR }, 0x43, INSTR_RRF_UURF }, @@ -1160,6 +1173,7 @@ static struct s390_insn opcode_b9[] = { { { 0, LONG_INSN_SLHHLR }, 0xdb, INSTR_RRF_R0RR2 }, { "chlr", 0xdd, INSTR_RRE_RR }, { "clhlr", 0xdf, INSTR_RRE_RR }, + { { 0, LONG_INSN_LOCFHR }, 0xe0, INSTR_RRF_U0RR }, { { 0, LONG_INSN_POPCNT }, 0xe1, INSTR_RRE_RR }, { "locgr", 0xe2, INSTR_RRF_M0RR }, { "ngrk", 0xe4, INSTR_RRF_R0RR2 }, @@ -1309,6 +1323,7 @@ static struct s390_insn opcode_e3[] = { { "stg", 0x24, INSTR_RXY_RRRD }, { "ntstg", 0x25, INSTR_RXY_RRRD }, { "cvdy", 0x26, INSTR_RXY_RRRD }, + { "lzrg", 0x2a, INSTR_RXY_RRRD }, { "cvdg", 0x2e, INSTR_RXY_RRRD }, { "strvg", 0x2f, INSTR_RXY_RRRD }, { "cgf", 0x30, INSTR_RXY_RRRD }, @@ -1316,6 +1331,8 @@ static struct s390_insn opcode_e3[] = { { "ltgf", 0x32, INSTR_RXY_RRRD }, { "cgh", 0x34, INSTR_RXY_RRRD }, { "pfd", 0x36, INSTR_RXY_URRD }, + { { 0, LONG_INSN_LLZRGF }, 0x3a, INSTR_RXY_RRRD }, + { "lzrf", 0x3b, INSTR_RXY_RRRD }, { "strvh", 0x3f, INSTR_RXY_RRRD }, { "bctg", 0x46, INSTR_RXY_RRRD }, { "sty", 0x50, INSTR_RXY_RRRD }, @@ -1595,6 +1612,8 @@ static struct s390_insn opcode_eb[] = { { "slak", 0xdd, INSTR_RSY_RRRD }, { "srlk", 0xde, INSTR_RSY_RRRD }, { "sllk", 0xdf, INSTR_RSY_RRRD }, + { "locfh", 0xe0, INSTR_RSY_RURD2 }, + { { 0, LONG_INSN_STOCFH }, 0xe1, INSTR_RSY_RURD2 }, { "locg", 0xe2, INSTR_RSY_RDRM }, { "stocg", 0xe3, INSTR_RSY_RDRM }, { "lang", 0xe4, INSTR_RSY_RRRD }, @@ -1620,8 +1639,11 @@ static struct s390_insn opcode_eb[] = { }; static struct s390_insn opcode_ec[] = { + { "lochi", 0x42, INSTR_RIE_RUI0 }, { "brxhg", 0x44, INSTR_RIE_RRP }, { "brxlg", 0x45, INSTR_RIE_RRP }, + { { 0, LONG_INSN_LOCGHI }, 0x46, INSTR_RIE_RUI0 }, + { { 0, LONG_INSN_LOCHHI }, 0x4e, INSTR_RIE_RUI0 }, { { 0, LONG_INSN_RISBLG }, 0x51, INSTR_RIE_RRUUU }, { "rnsbg", 0x54, INSTR_RIE_RRUUU }, { "risbg", 0x55, INSTR_RIE_RRUUU }, @@ -1717,6 +1739,10 @@ static struct s390_insn opcode_ed[] = { { "mee", 0x37, INSTR_RXE_FRRD }, { "mad", 0x3e, INSTR_RXF_FRRDF }, { "msd", 0x3f, INSTR_RXF_FRRDF }, + { "cdpt", 0xae, INSTR_RSL_LRDFU }, + { "cxpt", 0xaf, INSTR_RSL_LRDFU }, + { "cpdt", 0xac, INSTR_RSL_LRDFU }, + { "cpxt", 0xad, INSTR_RSL_LRDFU }, { "", 0, INSTR_INVALID } }; |