diff options
| author | Atish Patra <atish.patra@wdc.com> | 2020-07-15 16:30:06 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2020-07-30 11:37:48 -0700 |
| commit | 79b1feba54558bfb7df7c516dab29a7c9dba093c (patch) | |
| tree | 9ca9147c34ce65cb5e59485675978dca7b21d7dc /arch/riscv | |
| parent | 925ac7b6636b6d6a195e93b2179741d3589f4be1 (diff) | |
RISC-V: Setup exception vector early
The trap vector is set only in trap_init which may be too late in some
cases. Early ioremap/efi spits many warning messages which may be useful.
Setup the trap vector early so that any warning/bug can be handled before
generic code invokes trap_init.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/kernel/head.S | 10 | ||||
| -rw-r--r-- | arch/riscv/kernel/smpboot.c | 2 | ||||
| -rw-r--r-- | arch/riscv/kernel/traps.c | 8 |
3 files changed, 10 insertions, 10 deletions
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 7ed1b22950fd..d0c5c316e9bb 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -77,10 +77,16 @@ relocate: csrw CSR_SATP, a0 .align 2 1: - /* Set trap vector to spin forever to help debug */ - la a0, .Lsecondary_park + /* Set trap vector to exception handler */ + la a0, handle_exception csrw CSR_TVEC, a0 + /* + * Set sup0 scratch register to 0, indicating to exception vector that + * we are presently executing in kernel. + */ + csrw CSR_SCRATCH, zero + /* Reload the global pointer */ .option push .option norelax diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 403bd93412a4..47404d4ad721 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -154,10 +154,10 @@ asmlinkage __visible void smp_callin(void) mmgrab(mm); current->active_mm = mm; - trap_init(); notify_cpu_starting(curr_cpuid); update_siblings_masks(curr_cpuid); set_cpu_online(curr_cpuid, 1); + /* * Remote TLB flushes are ignored while the CPU is offline, so emit * a local TLB flush right now just in case. diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index 7d95cce5e47c..ad14f4466d92 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -174,13 +174,7 @@ int is_valid_bugaddr(unsigned long pc) } #endif /* CONFIG_GENERIC_BUG */ +/* stvec & scratch is already set from head.S */ void trap_init(void) { - /* - * Set sup0 scratch register to 0, indicating to exception vector - * that we are presently executing in the kernel - */ - csr_write(CSR_SCRATCH, 0); - /* Set the exception vector address */ - csr_write(CSR_TVEC, &handle_exception); } |