diff options
author | Christoph Hellwig <hch@lst.de> | 2019-10-28 13:10:34 +0100 |
---|---|---|
committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-11-13 13:20:41 -0800 |
commit | 3b03ac6bbd6ef6264d533791ac448e20bfb1858d (patch) | |
tree | 9c93e31caf8da08e6d9a0f0b04c75e8f78d4ba75 /arch/riscv | |
parent | eded8bc66a0c2c43a1789ac6c973e2c5d47eac12 (diff) |
riscv: poison SBI calls for M-mode
There is no SBI when we run in M-mode, so fail the compile for any code
trying to use SBI calls.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r-- | arch/riscv/include/asm/sbi.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 21134b3ef404..b167af3e7470 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -8,6 +8,7 @@ #include <linux/types.h> +#ifdef CONFIG_RISCV_SBI #define SBI_SET_TIMER 0 #define SBI_CONSOLE_PUTCHAR 1 #define SBI_CONSOLE_GETCHAR 2 @@ -93,5 +94,5 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, { SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid); } - -#endif +#endif /* CONFIG_RISCV_SBI */ +#endif /* _ASM_RISCV_SBI_H */ |