diff options
| author | Roland Dreier <rolandd@cisco.com> | 2005-11-07 00:58:13 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-07 07:53:26 -0800 |
| commit | b0f7b8bc57ee90138a7c429951457027a90c326f (patch) | |
| tree | 07f320bf7d240273faf64d02069488fb29761ae8 /arch/powerpc | |
| parent | 41aace4fe81e3da52fa80b8380e5d2d084f77691 (diff) | |
[PATCH] ppc32: Add 440SPe support
Add support for the AMCC PowerPC 440SPe SoC, including PCI Express in root
port mode.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/kernel/cputable.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 33c63bcf69f8..cc4e9eb1c13f 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -929,6 +929,16 @@ struct cpu_spec cpu_specs[] = { .icache_bsize = 32, .dcache_bsize = 32, }, + { /* 440SPe Rev. A */ + .pvr_mask = 0xff000fff, + .pvr_value = 0x53000890, + .cpu_name = "440SPe Rev. A", + .cpu_features = CPU_FTR_SPLIT_ID_CACHE | + CPU_FTR_USE_TB, + .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, + .icache_bsize = 32, + .dcache_bsize = 32, + }, #endif /* CONFIG_44x */ #ifdef CONFIG_FSL_BOOKE { /* e200z5 */ |