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authorThomas Gleixner <tglx@linutronix.de>2020-10-24 22:35:04 +0100
committerThomas Gleixner <tglx@linutronix.de>2020-10-28 20:26:24 +0100
commit2e730cb56b2cd1626fecaf23ef1537fb24721ef2 (patch)
tree213615c96b65af65ee75eea0a2cd2890e3a3f91f /arch/powerpc
parent93b7a3d6a1f0f159d390959de7a1b9ad863d6b26 (diff)
x86/devicetree: Fix the ioapic interrupt type table
The ioapic interrupt type table is wrong as it assumes that polarity in IO/APIC context means active high when set. But the IO/APIC polarity is working the other way round. This works because the ordering of the entries is consistent with the device tree and the type information is not used by the IO/APIC interrupt chip. The whole trigger and polarity business of IO/APIC is misleading and the corresponding constants which are defined as 0/1 are not used consistently and are going to be removed. Rename the type table members to 'is_level' and 'active_low' and adjust the type information for consistency sake. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20201024213535.443185-5-dwmw2@infradead.org
Diffstat (limited to 'arch/powerpc')
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