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authorScott Wood <oss@buserror.net>2017-06-24 21:39:05 -0500
committerMichael Ellerman <mpe@ellerman.id.au>2017-07-24 21:20:31 +1000
commit446183e4069e0b62cedfd72ccb90b801b7a5aa98 (patch)
treefaaf011197744dbf9ff3f2a4309b0f9fb2b9d690 /arch/powerpc/sysdev/ipic.c
parent8f36479d0eda3c078ee4e1ec79ea9a2650cd0996 (diff)
powerpc/ipic: Support edge on IRQ0
External IRQ0 (index 48) has the same capabilities as the other IRQ1-7 and is handled by the same register IPIC_SEPNR. When this register is not specified for "ack" in "ipic_info", you cannot configure this IRQ as IRQ_TYPE_EDGE_FALLING. This oversight was probably due to the non-contiguous hwirq numbering of IRQ0 in the IPIC. Signed-off-by: Jurgen Schindele <schindele@nentec.de> [scottwood: Cleaned up commit message and posted as a proper patch] Signed-off-by: Scott Wood <oss@buserror.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/sysdev/ipic.c')
-rw-r--r--arch/powerpc/sysdev/ipic.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index f267ee0afc08..16f1edd78c40 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -315,6 +315,7 @@ static struct ipic_info ipic_info[] = {
.prio_mask = 7,
},
[48] = {
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
.force = IPIC_SEFCR,