diff options
author | Olof Johansson <olof@lixom.net> | 2007-09-08 05:13:19 +1000 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-09-14 01:33:25 +1000 |
commit | 0d72ba930cbc9140a584af7e4e65041b6c7a7d18 (patch) | |
tree | 8dd36503702183fb15f5e783249433c9880e45ee /arch/powerpc/platforms/pasemi/Kconfig | |
parent | 2099172d61abda1b793b499bb8edcaac4de2cdae (diff) |
[POWERPC] Add workaround for MPICs with broken register reads
Some versions of PWRficient 1682M have an interrupt controller in which
the first register in each pair for interrupt sources doesn't always
read with the right polarity/sense values.
To work around this, keep a software copy of the register instead. Since
it's not modified from the mpic itself, it's a feasible solution. Still,
keep it under a config option to avoid wasting memory on other platforms.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/pasemi/Kconfig')
-rw-r--r-- | arch/powerpc/platforms/pasemi/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig index 95cd90fd81c7..117d90aa5008 100644 --- a/arch/powerpc/platforms/pasemi/Kconfig +++ b/arch/powerpc/platforms/pasemi/Kconfig @@ -5,6 +5,7 @@ config PPC_PASEMI select MPIC select PPC_UDBG_16550 select PPC_NATIVE + select MPIC_BROKEN_REGREAD help This option enables support for PA Semi's PWRficient line of SoC processors, including PA6T-1682M |