[POWERPC] 85xx/86xx: refactor RSTCR reset code

On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board.  We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

3 files changed, 2 insertions, 58 deletions

diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index c794d88fa55f..6390895e5e92 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -37,8 +37,6 @@
 #include <sysdev/fsl_pci.h>
 #include <sysdev/fsl_soc.h>
 
-#define MPC86XX_RSTCR_OFFSET	(0xe00b0)	/* Reset Control Register */
-
 void __init
 mpc86xx_hpcd_init_irq(void)
 {
@@ -187,21 +185,6 @@ static int __init mpc86xx_hpcd_probe(void)
 	return 0;
 }
 
-void
-mpc86xx_restart(char *cmd)
-{
-	void __iomem *rstcr;
-
-	rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
-
-	local_irq_disable();
-
-	/* Assert reset request to Reset Control Register */
-	out_be32(rstcr, 0x2);
-
-	/* not reached */
-}
-
 long __init
 mpc86xx_time_init(void)
 {
@@ -225,7 +208,7 @@ define_machine(mpc86xx_hpcd) {
 	.setup_arch		= mpc86xx_hpcd_setup_arch,
 	.init_IRQ		= mpc86xx_hpcd_init_irq,
 	.get_irq		= mpic_get_irq,
-	.restart		= mpc86xx_restart,
+	.restart		= fsl_rstcr_restart,
 	.time_init		= mpc86xx_time_init,
 	.calibrate_decr		= generic_calibrate_decr,
 	.progress		= udbg_progress,
diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
deleted file mode 100644
index 41e554c4af94..000000000000
--- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * MPC8641 HPCN board definitions
- *
- * Copyright 2006 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- * Author: Xianghua Xiao <x.xiao@freescale.com>
- */
-
-#ifndef __MPC8641_HPCN_H__
-#define __MPC8641_HPCN_H__
-
-#include <linux/init.h>
-
-#define MPC86XX_RSTCR_OFFSET	(0xe00b0)	/* Reset Control Register */
-
-#endif	/* __MPC8641_HPCN_H__ */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 6879b83ef95a..32a531aebcb7 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -35,7 +35,6 @@
 #include <sysdev/fsl_soc.h>
 
 #include "mpc86xx.h"
-#include "mpc8641_hpcn.h"
 
 #undef DEBUG
 
@@ -196,23 +195,6 @@ static int __init mpc86xx_hpcn_probe(void)
 	return 0;
 }
 
-
-void
-mpc86xx_restart(char *cmd)
-{
-	void __iomem *rstcr;
-
-	rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
-
-	local_irq_disable();
-
-	/* Assert reset request to Reset Control Register */
-	out_be32(rstcr, 0x2);
-
-	/* not reached */
-}
-
-
 long __init
 mpc86xx_time_init(void)
 {
@@ -237,7 +219,7 @@ define_machine(mpc86xx_hpcn) {
 	.init_IRQ		= mpc86xx_hpcn_init_irq,
 	.show_cpuinfo		= mpc86xx_hpcn_show_cpuinfo,
 	.get_irq		= mpic_get_irq,
-	.restart		= mpc86xx_restart,
+	.restart		= fsl_rstcr_restart,
 	.time_init		= mpc86xx_time_init,
 	.calibrate_decr		= generic_calibrate_decr,
 	.progress		= udbg_progress,