diff options
| author | Haiying Wang <Haiying.Wang@freescale.com> | 2009-05-01 15:40:50 -0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-05-19 00:50:26 -0500 |
| commit | 4b3b42b38af82e4815178d4762986f246adfe0ec (patch) | |
| tree | 91354ff3ce87e8cfd288a1c60b80991b940b43b6 /arch/powerpc/platforms/85xx | |
| parent | 674e4f93e2524e5710d5f2081feaedfd08f924a7 (diff) | |
powerpc/85xx: Add MPC8569MDS board support
The MPC8569 is similiar to the MPC8568. It doubles the number of
QUICC Engine RISC cores from 2 to 4. Removes eTSECs, TLU and adds
the eSDHC controller.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/85xx')
| -rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_mds.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index d34d29acbd3d..b2c0a4319973 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -259,6 +259,7 @@ static int __init board_fixups(void) return 0; } machine_arch_initcall(mpc8568_mds, board_fixups); +machine_arch_initcall(mpc8569_mds, board_fixups); static struct of_device_id mpc85xx_ids[] = { { .type = "soc", }, @@ -278,6 +279,7 @@ static int __init mpc85xx_publish_devices(void) return 0; } machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); +machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); static void __init mpc85xx_mds_pic_init(void) { @@ -335,3 +337,24 @@ define_machine(mpc8568_mds) { .pcibios_fixup_bus = fsl_pcibios_fixup_bus, #endif }; + +static int __init mpc8569_mds_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + return of_flat_dt_is_compatible(root, "fsl,MPC8569EMDS"); +} + +define_machine(mpc8569_mds) { + .name = "MPC8569 MDS", + .probe = mpc8569_mds_probe, + .setup_arch = mpc85xx_mds_setup_arch, + .init_IRQ = mpc85xx_mds_pic_init, + .get_irq = mpic_get_irq, + .restart = fsl_rstcr_restart, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, +#endif +}; |