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authorRobert P. J. Day <rpjday@mindspring.com>2007-05-09 07:14:03 +0200
committerAdrian Bunk <bunk@stusta.de>2007-05-09 07:14:03 +0200
commitbeb7dd86a101263bf63a78c7c6d4da3849b35bd6 (patch)
tree9afe81ca9e92ab8aacc999ae118b27d547721f11 /arch/powerpc/oprofile/op_model_cell.c
parent3dde6ad8fc3939d345a3768464ecff43c91d511a (diff)
Fix misspellings collected by members of KJ list.
Fix the misspellings of "propogate", "writting" and (oh, the shame :-) "kenrel" in the source tree. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'arch/powerpc/oprofile/op_model_cell.c')
-rw-r--r--arch/powerpc/oprofile/op_model_cell.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c
index 626b29f38304..c29293befba9 100644
--- a/arch/powerpc/oprofile/op_model_cell.c
+++ b/arch/powerpc/oprofile/op_model_cell.c
@@ -747,7 +747,7 @@ cell_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr)
* counter value etc.) are not copied to the actual registers
* until the performance monitor is enabled. In order to get
* this to work as desired, the permormance monitor needs to
- * be disabled while writting to the latches. This is a
+ * be disabled while writing to the latches. This is a
* HW design issue.
*/
cbe_enable_pm(cpu);