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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2018-03-22 14:13:50 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2018-04-04 16:58:06 +1000
commitfb4e5dbd44564077fa0267a59b45961a1fd181b6 (patch)
treef809d1fe7cf7b578a660c92ee6858f8e7cd25df5 /arch/powerpc/mm/mmap.c
parentf2ed480fa4d7f95b190279722690df8d4a396b3e (diff)
powerpc/mm/radix: Update pte fragment count from 16 to 256 on radix
With split PTL (page table lock) config, we allocate the level 4 (leaf) page table using pte fragment framework instead of slab cache like other levels. This was done to enable us to have split page table lock at the level 4 of the page table. We use page->plt backing the all the level 4 pte fragment for the lock. Currently with Radix, we use only 16 fragments out of the allocated page. In radix each fragment is 256 bytes which means we use only 4k out of the allocated 64K page wasting 60k of the allocated memory. This was done earlier to keep it closer to hash. This patch update the pte fragment count to 256, thereby using the full 64K page and reducing the memory usage. Performance tests shows really low impact even with THP disabled. With THP disabled we will be contenting further less on level 4 ptl and hence the impact should be further low. 256 threads: without patch (10 runs of ./ebizzy -m -n 1000 -s 131072 -S 100) median = 15678.5 stdev = 42.1209 with patch: median = 15354 stdev = 194.743 This is with THP disabled. With THP enabled the impact of the patch will be less. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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