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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-02-21 16:49:58 +1100
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-04-01 15:37:25 +1100
commit62cc67b9df273be18fcb09a071592dedf751c90a (patch)
tree604363a8a8ea577b59c58e10ba7cf36a67ced624 /arch/powerpc/include
parente872e41b79f61dbc22f85577613925a4a7de1c1a (diff)
powerpc/pmac/smp: Properly NAP offlined CPU on G5
The current code soft-disables, and then goes to NAP mode which turns interrupts on. That means that if an interrupt occurs, we will hit the masked interrupt code path which isn't what we want, as it will return with EE off, which will either get us out of NAP mode, or fail to enter it (according to spec). Instead, let's just rely on the fact that it is safe to take decrementer interrupts on an offline CPU and leave interrupts enabled. We can also get rid of the special case in asm for power4_cpu_offline_powersave() and just use power4_idle(). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/machdep.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index bcfc0da2cef1..578d3309e109 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -266,7 +266,6 @@ struct machdep_calls {
extern void e500_idle(void);
extern void power4_idle(void);
-extern void power4_cpu_offline_powersave(void);
extern void ppc6xx_idle(void);
extern void book3e_idle(void);