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authorMaxime Ripard <maxime@cerno.tech>2020-03-17 09:29:11 +0100
committerMaxime Ripard <maxime@cerno.tech>2020-03-17 09:29:11 +0100
commit51b8479ab20ba3804348824c63abdb3f35b0aaeb (patch)
treef3ecae09fc31773c9da185de167bf2034f1aaa2e /arch/powerpc/include
parent6afe6929964bca6847986d0507a555a041f07753 (diff)
parent69ddce0970d9d1de63bed9c24eefa0814db29a5a (diff)
Merge drm/drm-next into drm-misc-next
Jernej needs some patches that got merged in -rc5. Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/page.h5
-rw-r--r--arch/powerpc/include/asm/processor.h4
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 86332080399a..080a0bf8e54b 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -295,8 +295,13 @@ static inline bool pfn_valid(unsigned long pfn)
/*
* Some number of bits at the level of the page table that points to
* a hugepte are used to encode the size. This masks those bits.
+ * On 8xx, HW assistance requires 4k alignment for the hugepte.
*/
+#ifdef CONFIG_PPC_8xx
+#define HUGEPD_SHIFT_MASK 0xfff
+#else
#define HUGEPD_SHIFT_MASK 0x3f
+#endif
#ifndef __ASSEMBLY__
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 8387698bd5b6..eedcbfb9a6ff 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -168,6 +168,10 @@ struct thread_struct {
unsigned long srr1;
unsigned long dar;
unsigned long dsisr;
+#ifdef CONFIG_PPC_BOOK3S_32
+ unsigned long r0, r3, r4, r5, r6, r8, r9, r11;
+ unsigned long lr, ctr;
+#endif
#endif
/* Debug Registers */
struct debug_reg debug;