diff options
| author | Cédric Le Goater <clg@kaod.org> | 2019-04-18 12:39:37 +0200 |
|---|---|---|
| committer | Paul Mackerras <paulus@ozlabs.org> | 2019-04-30 19:35:16 +1000 |
| commit | 39e9af3de5ca936098bc80ebe14401426673c208 (patch) | |
| tree | 5446e397b92206069c6ef9d0503e851f0dadf47a /arch/powerpc/include/uapi/asm/kvm.h | |
| parent | a1cd3f0883f435e5f9ae6530d7e62b361c87a91a (diff) | |
KVM: PPC: Book3S HV: XIVE: Add a TIMA mapping
Each thread has an associated Thread Interrupt Management context
composed of a set of registers. These registers let the thread handle
priority management and interrupt acknowledgment. The most important
are :
- Interrupt Pending Buffer (IPB)
- Current Processor Priority (CPPR)
- Notification Source Register (NSR)
They are exposed to software in four different pages each proposing a
view with a different privilege. The first page is for the physical
thread context and the second for the hypervisor. Only the third
(operating system) and the fourth (user level) are exposed the guest.
A custom VM fault handler will populate the VMA with the appropriate
pages, which should only be the OS page for now.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Diffstat (limited to 'arch/powerpc/include/uapi/asm/kvm.h')
| -rw-r--r-- | arch/powerpc/include/uapi/asm/kvm.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h index cd3f16b70a2e..0998e8edc91a 100644 --- a/arch/powerpc/include/uapi/asm/kvm.h +++ b/arch/powerpc/include/uapi/asm/kvm.h @@ -720,4 +720,6 @@ struct kvm_ppc_xive_eq { #define KVM_XIVE_EQ_ALWAYS_NOTIFY 0x00000001 +#define KVM_XIVE_TIMA_PAGE_OFFSET 0 + #endif /* __LINUX_KVM_POWERPC_H */ |