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authorMichael Ellerman <mpe@ellerman.id.au>2020-11-27 00:10:02 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2020-12-04 01:01:10 +1100
commit1f1676bb2dd52c1054db8476d6387e6dcf62a1ba (patch)
tree66e6d46f1132c8ddebbf6a5ad8a2366e22c202ec /arch/powerpc/include/asm/barrier.h
parent5c189c523e78d4a70e874477e4b0628fd74207e4 (diff)
powerpc/barrier: Use CONFIG_PPC64 for barrier selection
Currently we use ifdef __powerpc64__ in barrier.h to decide if we should use lwsync or eieio for SMPWMB which is then used by __smp_wmb(). That means when we are building the compat VDSO we will use eieio, because it's 32-bit code, even though we're building a 64-bit kernel for a 64-bit CPU. Although eieio should work, it would be cleaner if we always used the same barrier, even for the 32-bit VDSO. So change the ifdef to CONFIG_PPC64, so that the selection is made based on the bitness of the kernel we're building for, not the current compilation unit. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20201126131006.2431205-5-mpe@ellerman.id.au
Diffstat (limited to 'arch/powerpc/include/asm/barrier.h')
-rw-r--r--arch/powerpc/include/asm/barrier.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
index f53c42380832..aecfde829d5d 100644
--- a/arch/powerpc/include/asm/barrier.h
+++ b/arch/powerpc/include/asm/barrier.h
@@ -40,7 +40,7 @@
#define wmb() __asm__ __volatile__ ("sync" : : : "memory")
/* The sub-arch has lwsync */
-#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
+#if defined(CONFIG_PPC64) || defined(CONFIG_PPC_E500MC)
# define SMPWMB LWSYNC
#else
# define SMPWMB eieio