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authorCliff Brake <cbrake@bec-systems.com>2009-01-22 17:07:03 -0500
committerPierre Ossman <drzeus@drzeus.cx>2009-02-02 20:57:07 +0100
commitb6018958a57f6621d6979c4384e42a3df636beed (patch)
tree84806c5f1b5839e66edcfc811927b137fda7a247 /arch/powerpc/configs
parente10a854c4602072c34c03380b99da0a3ee15682c (diff)
pxamci: enable DMA for write ops after CMD/RESP
With the PXA270 MMC hardware, there seems to be an issue of data corruption on writes where a 4KB data block is offset by one byte. If we delay enabling the DMA for writes until after the CMD/RESP has finished, the problem seems to be fixed. related to PXA270 Erratum #91 Tested-by: Vernon Sauder <VernonInHand@gmail.com> Signed-off-by: Cliff Brake <cbrake@bec-systems.com> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'arch/powerpc/configs')
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